Lessons in this course (11)

3. The memory hierarchy — registers, cache, RAM, disk

Basic★ Must knowLesson 3 of 11
LevelTypical sizeApprox. access timeNotes
Registers< 1 KB< 1 nsInside the core
L1 cache32–64 KB per core~1 ns
L2 cache256 KB – 2 MB per core~3–5 ns
L3 cache8–64 MB shared~10–20 ns
RAM (main memory)8–512 GB~80–100 nsVolatile — lost on power off
NVMe SSDTBs~20–100 µsPersistent
HDDTBs~5–10 msMechanical seek
Network (same datacenter)—~0.5 ms round trip
Network (across continents)—~150 ms round trip

Key idea: each level is ~10× to 1000× slower than the one above. Data moves between cache and RAM in cache lines of 64 bytes, so reading memory sequentially (arrays) is much faster than jumping around (linked lists, scattered objects) — this is locality of reference.

csharp
// Same work, very different speed: row-by-row walks memory sequentially (cache-friendly)
int[,] m = new int[5000, 5000];
long sum = 0;
for (int r = 0; r < 5000; r++) for (int c = 0; c < 5000; c++) sum += m[r, c];   // fast
for (int c = 0; c < 5000; c++) for (int r = 0; r < 5000; r++) sum += m[r, c];   // several times slower

This is also why SQL Server keeps data pages in RAM (buffer pool) and why caching (Redis, in-memory cache) speeds up applications: RAM is ~1000× faster than SSD and ~1,000,000× faster than a cross-continent network call.